Star元晶算 publica la hoja de ruta para chips de 1nm

Recently, Xingyuan Jing Suan officially released the technology roadmap for 1nm chips featuring advanced heterogeneous integrated high-energy-efficiency computing power aimed at 2030.
The long-term goal is to achieve an annual output of 10 terawatts (TW) of equivalent space computing power around 2030, combining the intrinsic high energy efficiency of two-dimensional materials with advanced packaging.
It aims to realize an output of equivalent 10 terawatts of computing power within a smaller physical scale, surpassing traditional silicon-based factories across generations in energy output ratio.
The plan includes deploying most of the computing power in space computing nodes, providing real-time support for global devices through a terrestrial-space collaborative link.

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